طراحي يك ضرب‌كننده برگشت‌پذير بهينه

In recent years, reversible circuits have become one of the most important research areas in computer science due to their lack of information loss an‎d their extensive applications in emerging an‎d modern technologies such as quantum computing, nanotechnology, low-power CMOS technology, optical computing, DNA computing, quantum cellular automata (QCA) technology, etc. These circuits play a key role in reducing energy consumption an‎d increasing the efficiency of modern systems, an‎d for this reason, their optimal design is of particular importance. One of the important components in this field is the design of optimized quantum multipliers. Multipliers are widely used in a variety of computing systems an‎d also involve a lot of cost due to the complexity of the multiplication operation. Therefore, multipliers can have a significant impact on the efficiency an‎d ultimate speed of quantum systems. A review of previous research shows that in most works, the main focus has been on reducing the quantum cost, which often leads to an increase in circuit dimensions, the number of fixed inputs, an‎d garbage outputs. To solve this problem, a different approach was proposed in this research, which, instead of focusing on quantum cost, focuses on reducing fixed inputs an‎d garbage outputs an‎d ultimately reducing the overall dimensions of the circuit. Initially, a partial product generation circuit was presented, the dimensions of which have been reduced by 37.5 to 40% compared to previous methods. Also, a reversible 4-bit multiplier was designed, the dimensions of which have been improved by 20 to 75% compared to previous methods. The results of this research can significantly help engineers an‎d researchers in the development of quantum technologies an‎d pave the way for the design of smaller an‎d more efficient quantum circuits in the future.

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