• RecordNumber
    86896
  • Author

    Yalamanchili, Sudhakar

  • Title

    Introductory VHDL : from simulation to synthesis

  • Author Statement
    Sudhakar Yalamanchili
  • Publication
    Prentice Hall
  • Publication Year
    c2001
  • Collation
    xix, 401 p. ill. 24 cm
  • Notes
    Includes bibliographical references and index
  • Subject

    VHDL (Computer hardware description language)

  • Main Class
    621.
  • Sub Class
    392
  • Cutter no
    Y16i
  • واردكننده اطلاعات
    ربابه صمدي علي نيا